? semiconductor components industries, llc, 2005 july, 2005 ? rev. 8 1 publication order number: MC74HCT138A/d MC74HCT138A 1?of?8 decoder/ demultiplexer with lsttl compatible inputs high?performance silicon?gate cmos the MC74HCT138A is identical in pinout to the ls138. the hct138a may be used as a level converter for interfacing ttl or nmos outputs to high speed cmos inputs. the hct138a decodes a three?bit address to one?of?eight active?lot outputs. this device features three chip select inputs, two active?low and one active?high to facilitate the demultiplexing, cascading, and chip?selecting functions. the demultiplexing function is accomplished by using the address inputs to select the desired device output; one of the chip selects is used as a data input while the other chip selects are held in their active states. features ? output drive capability: 10 lsttl loads ? ttl/nmos compatible input levels ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 4.5 to 5.5 v ? low input current: 1.0 a ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 122 fets or 30.5 equivalent gates ? pb?free packages are available* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. http://onsemi.com marking diagrams soic?16 d suffix case 751b tssop?16 dt suffix case 948f 1 16 pdip?16 n suffix case 648 1 16 1 16 1 16 MC74HCT138An awlyywwg 1 16 hct138ag awlyww hct 138 alyw 1 16 a = assembly location wl, l = wafer lot y, yy = year w, ww = work week g = pb?free package see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information
inputs outputs cs1cs2 cs3 a2 a1 a0 y0 y1 y2 y3 y4 y5 y6 y7 x x h xxxhhhhhhhh x h x xxxhhhhhhhh l x x xxxhhhhhhhh h l l lll lhhhhhhh h l l llhhlhhhhhh h l l lhlhhlhhhhh h l l lhhhhhlhhhh h l l hllhhhhlhhh h l l hlhhhhhhlhh h l l hhlhhhhhhlh h l l hhhhhhhhhhl function table h = high level (steady state) l = low level (steady state) x = don?t care MC74HCT138A http://onsemi.com 2 logic diagram 7 y6 y5 y4 y3 y2 y1 y0 y7 9 10 11 12 13 14 15 3 2 1 cs1 cs2 a0 a1 a2 active?low outputs address inputs cs3 chip? select inputs 5 4 6 pin 16 = v cc pin 8 = gnd pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 a0 cs2 a2 a1 y7 cs1 cs3 gnd y3 y2 y1 y0 v cc y5 y4 y6 ????????? ????????? design criteria ??? ??? ??? ??? ????????? ? ???????? ????????? internal gate count* ??? ? ? ? ??? 30.5 ??? ? ? ? ??? ea. ????????? ????????? ??? ??? ??? ??? ????????? ????????? ??? ??? ??? ??? w ????????? ? ???????? ????????? speed power product ??? ? ? ? ??? .0075 ??? ? ? ? ??? pj *equivalent to a two?input nand gate. ordering information device package shipping ? MC74HCT138An pdip?16 500 units / box MC74HCT138Ang pdip?16 (pb?free) 500 units / box MC74HCT138Ad soic?16 48 units / rail MC74HCT138Adg soic?16 (pb?free) 48 units / rail MC74HCT138Adr2 soic?16 2500 units / tape & reel MC74HCT138Adr2g soic?16 (pb?free) 2500 units / tape & reel MC74HCT138Adtr2 tssop?16* 2500 units / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb?free.
MC74HCT138A http://onsemi.com 3 ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 20 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 50 ??? ??? ???? ? ?? ? ???? p d ?????????????? ? ???????????? ? ?????????????? power dissipation in still air plastic dip? soic package? tssop package? ????? ? ??? ? ????? 750 500 450 ??? ? ? ? ??? mw ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? c ???? ? ?? ? ???? t l ?????????????? ? ???????????? ? ?????????????? lead temperature, 1 mm from case for 10 seconds (plastic dip, tssop or soic package) ????? ? ??? ? ????? 260 ??? ? ? ? ??? c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ?derating ? plastic dip: ? 10 mw/ c from 65 to 125 c soic package: ? 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c for high frequency or heavy load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). recommended operating conditions ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? v cc ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? c ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? dc electrical characteristics (voltages referenced to gnd) ???? ? ?? ? ???? symbo l ?????????? ? ???????? ? ?????????? parameter ????????? ? ??????? ? ????????? test conditions ??? ? ? ? ??? v cc v ????????? ????????? ?? ?? ?? ???? ???? c ???? ???? 85 c ??? ??? 125 c ???? ? ?? ? ???? v ih ?????????? ? ???????? ? ?????????? minimum high?level input voltage ????????? ? ??????? ? ????????? v out = 0.1 v or v cc ? 0.1 v |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ???? ? ?? ? ???? 2.0 2.0 ???? ? ?? ? ???? 2.0 2.0 ??? ? ?? ??? 2.0 2.0 ?? ?? ?? ???? ???? ?????????? ?????????? ????????? ????????? 20 a ??? ??? ???? ???? ???? ???? ??? ??? ?? ?? ???? ? ?? ? ? ?? ? ? ?? ? ???? v oh ?????????? ? ???????? ? ? ???????? ? ? ???????? ? ?????????? minimum high?level output voltage ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ???? ? ?? ? ???? 4.4 5.4 ???? ? ?? ? ???? 4.4 5.4 ??? ? ?? ??? 4.4 5.4 ?? ?? ?? ?? ?? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 4.0 a ??? ? ? ? ??? 4.5 ???? ? ?? ? ???? 3.98 ???? ? ?? ? ???? 3.84 ??? ? ?? ??? 3.7 ???? ? ?? ? ? ?? ? ???? v ol ?????????? ? ???????? ? ? ???????? ? ?????????? maximum low?level output voltage ????????? ????????? 20 a ??? ??? ???? ???? ???? ???? ??? ??? ?? ?? ?? ?? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 4.0 ma ??? ? ? ? ??? 4.5 ???? ? ?? ? ???? 0.26 ???? ? ?? ? ???? 0.33 ??? ? ?? ??? 0.4 ???? ???? ?????????? ?????????? ????????? ????????? ??? ??? ???? ???? 0.1 ???? ???? 1.0 ??? ??? 1.0 ?? ?? a ???? ? ?? ? ???? i cc ?????????? ? ???????? ? ?????????? maximum quiescent supply current (per package) ????????? ? ??????? ? ????????? v in = v cc or gnd i out = 0 a ??? ? ? ? ??? 5.5 ???? ? ?? ? ???? 4.0 ???? ? ?? ? ???? 40 ??? ? ?? ??? 160 ?? ?? ?? a ???? ? ?? ? ???? i cc ?????????? ? ???????? ? ?????????? additional quiescent supply current ????????? ? ??????? ? ????????? v in = 2.4 v, any one input v in = v cc or gnd, other inputs l out = 0 a ??? ? ? ? ??? 5.5 ???? ???? ? 55 c ?????? ?????? c to 125 c ?? ?? ?? ma ???? ???? ?????? ?????? (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
MC74HCT138A http://onsemi.com 4 ac electrical characteristics (v cc = 5.0 v 10%, c l = 50 pf, input t r = t f = 6.0 ns) ???? ? ?? ? ? ?? ? ???? symbo l ???????????????????? ? ?????????????????? ? ? ?????????????????? ? ???????????????????? parameter ????????? ????????? ?? ?? ?? ?? ???? ? ?? ? ???? ? 55 to 25 c ???? ? ?? ? ???? 85 c ??? ? ?? ??? 125 c ???? ???? t plh , t phl ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? ???? ? ?? ? ???? t plh , t phl ???????????????????? ? ?????????????????? ? ???????????????????? maximum propagation delay, cs1 to output y (figures 2 and 4) ???? ? ?? ? ???? 27 ???? ? ?? ? ???? 34 ??? ? ?? ??? 41 ?? ?? ?? ???? ? ?? ? ???? t plh , t phl ???????????????????? ? ?????????????????? ? ???????????????????? maximum output transition time, cs2 or cs3 to output y (figures 3 and 4) ???? ? ?? ? ???? 30 ???? ? ?? ? ???? 38 ??? ? ?? ??? 45 ?? ?? ?? ???? ???? ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? ???? ???? ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? ???? ???? ???????????????????? ???????????????????? ???? ???? ???? ???? ??? ??? ?? ?? typical @ 25 c, v cc = 5.0 v pf 51 * used to determine the no?load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). expanded logic diagram a0 a1 a2 cs3 cs2 cs1 1 2 3 4 5 6 15 14 13 12 11 10 9 7 y1 y2 y3 y4 y5 y6 y7 y0
MC74HCT138A http://onsemi.com 5 switching waveforms figure 1. 1.3 v t phl t plh t thl t tlh 3 v gnd figure 2. valid output y 1.3 v 3 v gnd t f t f t phl t plh output y input cs2, cs3 90% 1.3 v 10% t r 3 v gnd t plh t tlh 90% 10% output y input cs1 t phl 2.7 v 1.3 v 0.3 v t thl input a figure 3. t r *includes all probe and jig capacitance figure 4. c l * test point device under test output valid 1.3 v 2.7 v 1.3 v 0.3 v test circuit
MC74HCT138A http://onsemi.com 6 package dimensions pdip?16 n suffix case 648?08 issue t soic?16 d suffix case 751b?05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ?a? b f c s h g d j l m 16 pl seating 18 9 16 k plane ?t? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p ?b? ?a? m 0.25 (0.010) b s ?t? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019
MC74HCT138A http://onsemi.com 7 package dimensions tssop?16 dt suffix case 948f?01 issue a ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. section n?n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ?t? ?v? ?w? 0.25 (0.010) 16x ref k n n
MC74HCT138A http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 MC74HCT138A/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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